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BLE112 data sheet wednesday, 25 march 2015 versi on 1. 4 6
bluegiga technologies oy copyright ? 2000 - 2015 bluegiga technologies all rights reserved. bluegiga technologies assumes no responsibility for any errors which may appear in this manual. furthermore, bluegiga technolo gies reserves the right to alter the hardware, software, and/or specifications detailed here at any time without notice and does not make any commitment to update the information contained here. bluegigas products are not authorized for use as critical co mponents in life support devices or systems. the wrap is a registered trademark of bluegiga technologies the bluetooth trademark is owned by the bluetooth sig inc., usa and is licensed to bluegiga technologies. all other trademarks listed herein are owned by their respective owners.
bluegiga technologies oy version history version comment 1.0 certification information updated . layout guide for BLE112 - n added. 1.1 rf pin dimensions added 1.11 absolute maximum supply corrected 1.2 certification information updated 1.21 current consumption added 1.22 current consumption profiles added 1.23 typo corrected on table 2 1.24 uart chapter , i/o ports chapter , dc characteristics 1.25 updated product codes 1.26 note about p1_0 and p1_1 in chapter 2.1 1.27 design check list, peripher al pull - up/pull - down requirements 1.28 updating alternate configuration table for clarity 1.29 absolute maximum ratings: all supply nets must have the same voltage . opamp and comparator removed from the peripherals table. 1.3 mic japan information upd ated 1.4 updated contact information 1.41 ce info updated 1.42 txp vs hw config added 1.43 peripheral mapping table: analog comparator added 1.44 product codes updates 1.45 ce info updated 1.46 layout examples added
bluegiga technologies oy table of contents 1 BLE112 product numbering ................................ ................................ ................................ .......................... 6 2 pinout and terminal descrip tion ................................ ................................ ................................ ................... 7 2.1 i/o ports ................................ ................................ ................................ ................................ .............. 10 2.2 uart ................................ ................................ ................................ ................................ ................... 10 2.3 electrical characteristics ................................ ................................ ................................ ..................... 11 2.4 absolute maximum ratings ................................ ................................ ................................ ................ 11 2.5 recommended operating conditions ................................ ................................ ................................ . 11 2.6 dc characteristics ................................ ................................ ................................ .............................. 11 2.7 current c onsumption ................................ ................................ ................................ .......................... 12 2.8 rf characteristics ................................ ................................ ................................ ............................... 13 2.8.1 tx power vs hw configuration ................................ ................................ ................................ ... 13 2.8.2 antenna characteristics ................................ ................................ ................................ ................ 13 3 physical dimensions ................................ ................................ ................................ ................................ .. 16 4 power - on reset and brownout detector ................................ ................................ ................................ ... 18 5 design guidelines ................................ ................................ ................................ ................................ ...... 19 5.1 general design guidelines ................................ ................................ ................................ ................. 19 5.2 layout guide lines ................................ ................................ ................................ ............................. 20 5.3 BLE112 - a layout guide ................................ ................................ ................................ ..................... 20 5.4 BLE112 - n layout guide ................................ ................................ ................................ ..................... 21 5. 5 design check list ................................ ................................ ................................ ............................... 23 6 soldering recommendations ................................ ................................ ................................ ..................... 24 7 block diagram ................................ ................................ ................................ ................................ ............. 25 8 certifications ................................ ................................ ................................ ................................ ............... 28 8.1 bluetooth ................................ ................................ ................................ ................................ ............. 28 8.2 fcc and ic ................................ ................................ ................................ ................................ ......... 28 8.2.1 fcc et ic ................................ ................................ ................................ ................................ ..... 29 8.3 ce ................................ ................................ ................................ ................................ ....................... 31 8.4 mic japan ................................ ................................ ................................ ................................ ........... 31 8.5 kcc (korea) ................................ ................................ ................................ ................................ ........ 31 8.6 qualified antenna types for BLE112 - e and BLE112 - n ................................ ................................ ..... 31 9 contact information ................................ ................................ ................................ ................................ .... 33
bluegiga technologies oy BLE112 blu etooth ? low energy single mode module description BLE112, bluetooth low energy single mode module is a single mode device targeted for low power sensors and accessories. BLE112 offers all bluetooth low energy features: radio, stack, profiles and appli cation space for customer applications, so no external processor is needed. the module also provides flexible hardware interfaces to connect sensors, simple user interfaces or even displays directly to the module. BLE112 can be power ed directly with a stan dard 3v coin cell batteries or pair of aaa batteries. in lowest power sleep mode it consumes only 400na and will wake up in few hundred microseconds. applications: ? heart rate sensors ? pedometers ? watches ? blood pressure and glucose meters ? weight scales ? key fobs ? households sensors and collector devices ? security tags ? wireless keys (keyless go) ? proximity sensors ? hid keyboards and mice ? indoor gps broadcasting devices key features: ? bluetooth v.4.0 , single mode compliant o supports master and slave modes o 4+ simul taneous connection in master mode ? integrated bluetooth low energy stack o gap, gatt, l2cap, smp o bluetooth low energy profiles ? radio performance o tx power: +3 dbm to - 23dbm o rx sensitiv ity: - 85 dbm to - 91 dbm ? ultra low current consumption o transmit: 27ma (0dbm) o s leep mode 3: 0.4ua ? programmable 8051 processor for embedding full applications ? bluetooth qualified ? ce qualified ? modular certification for fcc, ic and kcc ? mic japan compatibility fully tested with arib std - t66
bluegiga technologies oy page 6 of 34 1 BLE112 product numbering product code description BLE112 - a - v1 BLE112 with integrated chip antenna and software version 1.0 BLE112 - e - v1 BLE112 with u.fl connector and software version 1.0
bluegiga technologies oy page 7 of 34 2 pinout and terminal descrip tion figure 1 : BLE112 *) rf pin is not connected in BLE112 - a and BLE112 - e . to use rf pin with BLE112 - b please see the design guide. table 1 : supply and rf terminal descriptions 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 32 31 30 29 28 27 26 25 24 23 22 gnd avdd gnd avdd gnd gnd p2_2 p2_1 p2_0 p1_7 p1_6 vdd_usb usb+ usb - p1_5 dvdd p0_7 p1_0 p1_1 p1_2 p1_3 p1_4 p0_3 reset p0_0 p0_1 p0_2 p0_4 p0_5 p0_6 rf rfgnd pin number pad type description reset 29 active low reset. gnd 1, 10, 21, 30 gnd gnd rf 31 rf (* rf output/input for BLE112-n. with BLE112-a and BLE112-e do not connect. rfgnd 32 gnd rf ground. connected to gnd internally in the module. with BLE112-a and BLE112-e leave floating or connect to a solid gnd plane. dvdd 20 supply voltage supply voltage 2v - 3.6v avdd 2, 3 supply voltage supply voltage 2v - 3.6v vdd_usb 9 supply voltage supply voltage 2v - 3.6v
bluegiga technologies oy page 8 of 34 table 2 : terminal descri ptions *) BLE112 is configurable as either spi master or spi slave pin number pin name pin type description 4 p2_2 digital i/o configurable i/o port, see table 3 5 p2_1 digital i/o configurable i/o port, see table 3 6 p2_0 digital i/o configurable i/o port, see table 3 7 p1_7 digital i/o configurable i/o port, see table 3 8 p1_6 digital i/o configurable i/o port, see table 3 11 usb+ usb+ usb data plus 12 usb- usb- usb data minus 13 p1_5 digital i/o configurable i/o port, see table 3 14 p1_4 digital i/o configurable i/o port, see table 3 15 p1_3 digital i/o configurable i/o port, see table 3 16 p1_2 digital i/o configurable i/o port, see table 3 17 p1_1 digital i/o configurable i/o port with 20ma driving capability, see table 3 18 p1_0 digital i/o configurable i/o port with 20ma driving capability, see table 3 19 p0_7 digital i/o configurable i/o port, see table 3 22 p0_6 digital i/o configurable i/o port, see table 3 23 p0_5 digital i/o configurable i/o port, see table 3 24 p0_4 digital i/o configurable i/o port, see table 3 25 p0_3 digital i/o configurable i/o port, see table 3 26 p0_2 digital i/o configurable i/o port, see table 3 27 p0_1 digital i/o configurable i/o port, see table 3 28 p0_0 digital i/o configurable i/o port, see table 3
bluegiga technologies oy page 9 of 34 *) refer to pro file toolkit developer guide fo r detailed settings **) ss is the slave select signal when ble113 is set as spi slave. when set as spi master, any available i/o can be used as chip select signal of ble113 ***) the analog comparator and the adc will be turned on automatically when taken in use and the configuration is done using api (application programming interface). refer to bluetooth smart softw are api reference table 3 :peripheral i/o pin ma p ping hardware.xml example (* 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 2 1 0 + - (*** a7 a6 a5 a4 a3 a2 a1 a0 (*** alt.1 c ss mo mi bluegiga technologies oy page 10 of 34 2.1 i/o p orts each i/o port, except pins p1_0 and p1_1, can be configured as an input with either int ernal pull - up or pull - down , or tri - state. pull - down or pull - up can only be conf igured to whole port, not individual pins. unused i/o pins should have defined level and not be floating. to avoid excessive leakage current p1_0 and p1_1 must be configured either as outputs or as inputs using external pull - up or pull - down resistors. see the profile toolkit developer guide for more information about the configuration . during reset the i/o pins are configured as inputs with pull - ups. p1_0 and p1_1 are inputs but do not have pull - up or pull - down. the pins configured as peripheral i/o signal s do not have pull - up/pull - down capability, even if the peripheral function is an input. in power modes pm1, pm2, and pm3, the i/o pins retain the i/o mode and output value (if applicable) that was set when pm1/pm2/pm3 was entered. all the ios set as inpu t must have an external pull - up or pull - down resistor to avoid excessive leakage current. 2.2 uart uart baud rate can be configured up 2 mbps. see the profile toolkit developer guide for more information. following table lists commonly used baud rates for ble 112 baud rate (bps) error (%) 2400 0.14 4800 0.14 9600 0.14 14 400 0.03 19 200 0.14 28 800 0.03 38 400 0.14 57 600 0.03 76 800 0.14 115 200 0.03 230 400 0.03 table 4 : commonly used baud rates for BLE112
bluegiga technologies oy page 11 of 34 2.3 electrical ch aracteristics 2.4 absolute maximum ratings note: these are absolute maximum rating s beyond which the module can be permanently damaged. these are not maximum operating conditions. the maximum recommended operati ng conditions are in the table 6 . *) all supply nets must have the same voltage table 5 : absolute maximum ratings 2.5 recommended operating conditions *) supply voltage noise should be less than 10mvpp . excessive noise at the su pply voltage will reduce the rf performance. table 6 : recommended operating conditions 2.6 dc characteristics for detailed i/ o terminal characteristic and timings refer to the cc2540 datasheet available in ( http://www.ti.com/lit/ds/symlink/cc2540.pdf ) min max unit -40 85 c -0.3 3.9 v vss-0.4 vdd+0.4 v rating storage temperature other terminal voltages avdd,dvdd, vdd_usb (* min max unit -40 85 c 2.0 3.6 v rating operating temperature range avdd, dvdd, vdd_usb (* test conditions min typ max unit 0.5 v 2.5 v input equals 0v -50 50 na input equals vdd -50 50 na 20 k output load 4 ma 0.5 v outoput load 4 ma 2.4 v parameter logic-0 input voltage logic-0 output volatge, 4 ma pins i/o pin pull-up and pull-down resistors logic-1 output voltage, 4 ma pins logic-1 input voltage logic-0 input current logic-1 input current
bluegiga technologies oy page 12 of 34 2.7 current consumption table 7 : current consumption of BLE112 figure 2 : typical current consumption profile during advertising in slave mode figure 3 : typical current consumption profile during data connection in slave mode min typ max unit 36 ma 30 ma 28 ma 25 ma 235 ua 0.9 ua 0.4 ua power mode active mode tx 2 dbm power mode 2 power mode 1 power mode 3 active mode tx -2 dbm active mode tx -6 dbm active mode rx 0.9 ua (power mode 2) 0.9ua (power mode 2) 7.6 ma 7.6 ma 36 ma 25 ma 500 us 3.8 m s 500 us 7.6 ma 25 ma 36 ma 7.6 ma 0.9 ua (power mode 2) 0.9 ua (power mode 2)
bluegiga technologies oy page 13 of 34 2.8 rf characteristics 2.8.1 tx power vs hw configuration figure 4 : txp vs hw configuration 2.8.2 antenna characteristics the antenna radiation pattern is depends on the mother board layout. following characteristics are measured fr om a test board based on the layout guide given in chapter 5.3 . ? efficiency 33% ( - 4.8 db) ? peak gain 0 dbi
bluegiga technologies oy page 14 of 34 figure 5 : radiation pattern of BLE112, top view figure 6 : radiation pattern of BLE112, front view
bluegiga technologies oy page 15 of 34 figure 7 : radiation pattern of BLE112, side view
bluegiga technologies oy page 16 of 34 3 physical dimensions figure 8 : physical dimensions and pinout (top view) figure 9 : dimensions for the rf pin
bluegiga technologies oy page 17 of 34 figure 10 : physical dimensions (top view) figure 11 : physical dimensions (side view) figure 12 : recommended land pattern for BLE112 - a and BLE112 - e 18.10 mm 12.05 mm antenna u.fl 18.1 mm 2.1 mm 2.3 mm
bluegiga technologies oy page 18 of 34 4 power - on reset and brownout detector BLE112 includes a power - on reset (por), providing correct i nitialization during device power on. it also includes a brownout detector (bod) operating on the regulated 1.8 - v digital power supply only. the bod protects the memory contents during supply voltage variations which cause the regulated 1.8 - v power to drop below the minimum level required by digital logic, flash memory, and sram. when power is initially applied, the por and bod hold the device in the reset state until the supply voltage rises above the power - on - reset and brownout voltage s.
bluegiga technologies oy page 19 of 34 5 design guidelin es 5.1 general design guidelines BLE112 can be used directly with a coin cell battery . due to relatively high internal resistance of a coin cell battery it is recommended to place a 100uf capacitor in parallel with the battery. the internal resistance of a coi n cell battery is initially in the range of 10 ohms but the resistance increases rapidly as the capacity is used. basically the higher the value of the capacitor the higher is the effective capacity of the battery and thus the longer the life time for the application. the minimum value for the capacitor depends on the end application and the maximum transmit power used. the leakage current of a 100 uf capacitor is in the range of 0.5 ua to 3 ua and generally ceramic capacitors have lower leakage current than tantalum or aluminum electrolytic capacitors. optionally tis tps62730 can be used to reduce the current consumption during tx/rx and data processing stages. t ps62730 is an ultra low power dc/dc co nverter with by - pass mode and will reduce the current con sumption during transmission nominally by ~20% when using 3v coin cell battery. a f errite bead is recommended to be used to filter any excessive noise in the power supply lines to guarantee the radio performance. figure 13 : ex ample schematic for BLE112 with a coin cell battery figure 14 : example schematic for BLE112 with usb - p r a b l e 1 1 2 e v a l u a t i o n b o a r d - 1 2 . 0 4 . 2 0 1 1 - - c 1 . 0 1 3 r e v : s i z e : c o d e : d r a w n : d a t e d : d a t e d : c h e c k e d : q u a l i t y c o n t r o l : d a t e d : d a t e d : r e l e a s e d : c o m p a n y : t i t l e : d r a w i n g n o : s h e e t : o f s c a l e : r e v i s i o n r e c o r d a p p r o v e d : e c o n o : l t r d a t e : 1 2 3 4 5 6 d c b a c d b a o p t i o n a l d c / d c p r o g r a m m i n g i n t e r f a c e 1 2 u 4 b a t t e r y h o l d e r _ s m d _ c r 2 0 3 2 c 1 5 1 0 0 u f / 6 . 3 v / x 5 r 1 s t a t 2 s w 3 v i n 4 g n d 5 o n / b y p 6 v o u t u 5 t p s 6 2 7 3 0 c 1 0 2 . 2 u f / 1 0 v / x 5 r c 1 1 2 . 2 u f / 1 0 v / x 5 r l 1 2 . 2 h 2 0 % , 1 3 0 m a , 0 . 4 3 o h m 1 g n d 2 a v d d 3 a v d d 4 p 2 _ 2 5 p 2 _ 1 6 p 2 _ 0 7 p 1 _ 7 8 p 1 _ 6 9 d v d d _ u s b 1 0 g n d 1 1 u s b + 1 2 u s b - 1 3 p 1 _ 5 1 4 p 1 _ 4 1 5 p 1 _ 3 1 6 p 1 _ 2 1 7 p 1 _ 1 1 8 p 1 _ 0 1 9 p 0 : 7 2 0 d v d d 2 1 g n d 2 2 p 0 _ 6 2 3 p 0 _ 5 2 4 p 0 _ 4 2 5 p 0 _ 3 2 6 p 0 _ 2 2 7 p 0 _ 1 2 8 p 0 _ 0 2 9 r e s e t 3 0 g n d m o d 2 b l e 1 1 2 - a 1 3 5 2 4 6 7 8 9 1 0 j 1 h e a d e r _ 2 x 5 _ s m d _ 1 . 2 7 m m c 3 1 u f / 1 6 v / x 5 r c 5 1 u f / 1 6 v / x 5 r c 6 1 u f / 1 6 v / x 5 r p 1 _ 7 / d c d c v b a t p 2 _ 2 2 v . . . 3 v 3 _ s w p 2 _ 1 r e s e t _ n r e s e t _ n p 2 _ 2 p 2 _ 1 p 1 _ 7 / d c d c 1 2 . 0 4 . 2 0 1 1 - - - b l e 1 1 2 e v a l u a t i o n b o a r d p r a c - 1 . 0 2 3 r e v : s i z e : c o d e : d r a w n : d a t e d : d a t e d : c h e c k e d : q u a l i t y c o n t r o l : d a t e d : d a t e d : r e l e a s e d : c o m p a n y : t i t l e : d r a w i n g n o : s h e e t : o f s c a l e : r e v i s i o n r e c o r d a p p r o v e d : e c o n o : l t r d a t e : 1 2 3 4 5 6 d c b a c d b a 1 v b u s 2 d - 3 d + 4 n c 5 g n d 7 8 6 9 j 1 0 c o n - m i n i u s b - s o c k e t - s m d c 2 0 0 . 4 7 u f / 6 . 3 v / x 5 r c 3 1 2 . 2 u f / 1 0 v / x 5 r c 3 2 2 . 2 u f / 1 0 v / x 5 r 3 v i n 2 v o u t 1 g n d p 1 m c p 1 7 0 0 t - 3 3 0 2 e / t l 4 f b 1 k o h m 1 2 r 1 3 3 3 r , 5 0 v , 0 . 0 6 3 w 1 2 r 1 4 3 3 r , 5 0 v , 0 . 0 6 3 w 1 2 r 1 5 1 . 5 k , 5 0 v , 0 . 0 6 3 w c 1 2 7 4 7 p f / 5 0 v / c 0 g c 1 2 8 4 7 p f / 5 0 v / c 0 g 1 g n d 2 a v d d 3 a v d d 4 p 2 _ 2 5 p 2 _ 1 6 p 2 _ 0 7 p 1 _ 7 8 p 1 _ 6 9 d v d d _ u s b 1 0 g n d 1 1 u s b + 1 2 u s b - 1 3 p 1 _ 5 1 4 p 1 _ 4 1 5 p 1 _ 3 1 6 p 1 _ 2 1 7 p 1 _ 1 1 8 p 1 _ 0 1 9 p 0 : 7 2 0 d v d d 2 1 g n d 2 2 p 0 _ 6 2 3 p 0 _ 5 2 4 p 0 _ 4 2 5 p 0 _ 3 2 6 p 0 _ 2 2 7 p 0 _ 1 2 8 p 0 _ 0 2 9 r e s e t 3 0 g n d m o d 3 b l e 1 1 2 - a c 7 1 u f / 1 6 v / x 5 r c 8 1 u f / 1 6 v / x 5 r c 9 1 u f / 1 6 v / x 5 r r e s e t
bluegiga technologies oy page 20 of 34 5.2 layout guide lines use good layout practices to avoid excessive noise coupling to supply voltage traces or sensitive analog sig nal traces. if using overlapping ground planes use stitching vias separated by max 3 mm to avoid emission from the edges of the pcb. connect all the gnd pins directly to a solid gnd plane and make sure that there is a low impedance path for the return curr ent following the signal and supply traces all the way from start to the end. a good practice is to dedicate one of the inner layers to a solid gnd plane and one of the inner layers to supply voltage planes and traces and route all the signals on top and bottom layers of the pcb. this arrangement will make sure that any return current follows the forward current as close as possible and any loops are minimized. figure 15 : typical 4 - layer pcb construction figure 16 : use of stitching vias to avoid emissions from the edges of the pcb 5.3 BLE112 - a layout guide for optimal performance of the antenna place the module at the corner of the pcb as shown in the figure 17 . do not place any met al (traces, components, battery etc.) within the clearance area of the antenna. connect all the gnd pins directly to a solid gnd plane. place the gnd vias as close to the gnd pins as possible. use good layout practices to avoid any excessive noise coup ling to signal lines or supply voltage lines. avoid placing plastic or any other dielectric material closer than 5 mm from the antenna. any dielectric closer than 5 mm from the antenna will detune the antenna to lower frequencies. layout ? supply voltage C if possible use solid power plane C make sure that solid gnd plane follows the traces all the way C do not route supply voltage traces across separated gnd regions so that the path for the return current is cut ? mic input C place lc filtering and dc coupling capacitors symmetrically as c lose to audio pins as possible C place mic biasing resistors symmetrically as close to microhone as possible. C make sure that the bias trace does not cross separated gnd regio ns (dgnd - > agnd) so that the path for the return current is cut. if this is not possible the do not separate gnd regions but keep one solid gnd plane. C keep the trace as short as possible signals gnd power signals recommended pcb layer configuration overlapping gnd layers without gnd stitching vias overlapping gnd layers with gnd stitching vias shielding the rf energy
bluegiga technologies oy page 21 of 34 t figure 17 : recommended layout for BLE112 - a figure 18 : la y o u t e x a m pl e s for BLE112 5.4 BLE112 - n layout guide use 50 ohm transmission line to trace the signal from rf pin to an external rf connector . figure 19 shows a layout example for BLE112 - n with an external sma conn ector. copper clearance area copper clearance area
bluegiga technologies oy page 22 of 34 figure 19 : example layout for BLE112 - n a transmission line impedance calculator, such as tx - line made by awr, can be used to approximate the dimensions for the 50 ohm transmission line. figure 20 shows an example for two different 50 ohm transmission lines. board edge sma connector 50 ohm trace gnd contact for the rf trace gnd stitching vias separated by max 3 mm
bluegiga technologies oy page 23 of 34 figure 20 : example cross section of two different 50 ohm transmission line 5.5 design check list ? antenna is placed at the edge of a pcb, preferably to a corner ? anten na has sufficient clearance area around it and it is not covered by metal ? all the gnd pins are connected to a solid gnd plane ? all the ios are in a known state and there are no leakage paths from the ios o uart and spi inputs must have external pull - up or pul l - down o p1_0 and p1_1 must have either external pull - up or pull - down or configured as output ? tx power is set not higher than required for each application ? by - pass capacitor (47 uf 100uf) is placed parallel with a coin cell battery to compensate the high se ries resistance of a coin cell ? current test point is placed to measure the sleep current fr4, r = 4.6 prepreg, r = 3.7 w = 0.15 mm h = 0.076 mm g = 0.25 mm gnd stitching vias rf ground rf ground rf ground rf ground fr4, r = 4.6 h = 1 mm w = 1.8 mm microstrip cpw ground
bluegiga technologies oy page 24 of 34 6 soldering recommendations BLE112 is compatible with industrial standard reflow profile for pb - free solders. the reflow profile used is dependent on the thermal mass of the entire populated pcb, heat transfer efficiency of the oven and particular type of solder paste used. consult the datasheet of particular solder paste for profile configurations. bluegiga technologies will give following recommendations for solderin g the module to ensure reliable solder joint and operation of the module after soldering. since the profile used is process and layout dependent, the optimum profile should be studied case by case. thus following recommendation should be taken as a startin g point guide. - refer to technical documentations of particular solder paste for profile configurations - avoid using more than one flow. - reliability of the solder joint and self - alignment of the component are dependent on the solder volume. minimum of 150 ? m stencil thickness is recommended. - aperture size of the stencil should be 1:1 with the pad size. - a low residue, no clean solder paste should be used due to low mounted height of the component.
bluegiga technologies oy page 25 of 34 7 block diagram BLE112 is based on tis cc2540 chip. embed ded 32 mhz and 32.678 khz crystals are used for clock generation. matched balun and low pass filter provide optimal radio performance with extremely low spurious emissions . small ceramic chip antenna give s good radiation efficiency even when the module is used in layouts with very limited space. figure 21 : simplified block diagram of BLE112 cpu and memory the 8051 cpu core is a single - cycle 8051 - compatible core. it has three different memory access buses (sfr, data, and code/xda ta), a debug interface, and an 18 - input extended interrupt unit. the memory arbiter is at the heart of the system, as it connects the cpu and dma controller with the physical memories and all peripherals through the sfr bus. the memory arbiter has four mem ory - access points, access of which can map to one of three physical memories: an sram, flash memory, and xreg/sfr registers. it is responsible for performing arbitration and sequencing between simultaneous memory accesses to the same physical memory. the s fr bus is a common bus that connects all hardware peripherals to the memory arbiter. the sfr bus also provides access to the radio registers in the radio register bank, even though these are indeed mapped into xdata memory space. i/o controller cc2540 i/o 32 mhz xtal 32.768 khz xtal clock debug interface 8051 cpu core and memory arbitrator voltage regulator sram flash analog comparator opamp adc irq controller dma usb usart 0 usart 1 timer 1 timer 2 timer 3 timer 4 radio arbiter radio registers link layer engine sram modulator demodulator synth receive transmit frequency synthetisizer balun + lpf ant reset power - on reset 2v C 3.6v reset
bluegiga technologies oy page 26 of 34 the 8 - kb sram maps to the data memory space and to parts of the xdata memory spaces. the sram is an ultralow - power sram that retains its contents even when the digital part is powered off (power modes 2 and 3). the 128/256 kb flash block provides in - circuit programmable non - volatil e program memory for the device, and maps into the code and xdata memory spaces. peripherals writing to the flash block is performed through a flash controller that allows page - wise erasure and 4 - bytewise programming. a versatile five - channel dma controll er is available in the system, accesses memory using the xdata memory space, and thus has access to all physical memories. each channel (trigger, priority, transfer mode, addressing mode, source and destination pointers, and transfer count) is configured w ith dma descriptors that can be located anywhere in memory. many of the hardware peripherals (aes core, flash controller, usarts, timers, adc interface, etc.) can be used with the dma controller for efficient operation by performing data transfers between a single sfr or xreg address and flash/sram. each cc2540 contains a unique 48 - bit ieee address that can be used as the public device address for a bluetooth device. designers are free to use this address, or provide their own, as described in the bluetooth spec i fication. the interrupt controller services a total of 18 interrupt sources, divided into six interrupt groups, each of which is associated with one of four interrupt priorities. i/o and sleep timer interrupt requests are serviced even if the device is in a sleep mode (power modes 1 and 2) by bringing the cc2540 back to the active mode. the debug interface implements a proprietary two - wire serial interface that is used for in - circuit debugging. through this debug interface, it is possible to erase or program the entire flash memory, control which oscillators are enabled, stop and start execution of the user program, execute instructions on the 8051 core, set code breakpoints, and single - step through instructions in the code. using these techniques, it is possible to perform in - circuit debugging and external flash programming elegantly. the i/o controller is responsible for all general - purpose i/o pins. the cpu can configure whether peripheral modules control certain pins or whether they are under softwa re control, and if so, whether each pin is configured as an input or output and if a pullup or pulldown resistor in the pad is connected. each peripheral that connects to the i/o pins can choose between two different i/o pin locations to ensure flexibility in various applications. the sleep timer is an ultr a low power timer that use s an external 32.768 - khz crystal oscillator . the sleep timer runs continuously in all operating modes except power mode 3. typical applications of this timer are as a real - time c ounter or as a wake - up timer to exit power modes 1 or 2. a built - in watchdog timer allows the cc2540 to reset itself if the firmware hangs. when enabled by software, the watchdog timer must be cleared periodically; otherwise, it resets the device when it t imes out. timer 1 is a 16 - bit timer with timer/counter/pwm functionality. it has a programmable prescaler, a 16 - bit period value, and five individually programmable counter/capture channels, each with a 16 - bit compare value. each of the counter/capture cha nnels can be used as a pwm output or to capture the timing of edges on input signals. it can also be configured in ir generation mode, where it counts timer 3 periods and the output is anded with the output of timer 3 to generate modulated consumer ir sign als with minimal cpu interaction. timer 2 is a 40 - bit timer used by the bluetooth low energy stack. it has a 16 - bit counter with a configurable timer period and a 24 - bit overflow counter that can be used to keep track of the number of periods that have tra nspired. a 40 - bit capture register is also used to record the exact time at which a start - of - frame delimiter is received/transmitted or the exact time at which transmission ends. there are two 16 - bit timer - compare registers and two 24 - bit overflow - compare registers that can be used to give exact timing for start of rx or tx to the radio or general interrupts. timer 3 and timer 4 are 8 - bit timers with timer/counter/pwm functionality. they have a programmable prescaler, an 8 - bit period value, and one programm able counter channel with an 8 - bit compare value. each of the counter channels can be used as pwm output.
bluegiga technologies oy page 27 of 34 usart 0 and usart 1 are each configurable as either an spi master/slave or a uart. they provide double buffering on both rx and tx and hardware flow c ontrol and are thus well suited to high - throughput full - duplex applications. each usart has its own high - precision baud - rate generator, thus leaving the ordinary timers free for other uses. when configured as spi slaves, the usarts sample the input signal using sck directly instead of using some oversampling scheme, and are thus well - suited for high data rates. the aes encryption/decryption core allows the user to encrypt and decrypt data using the aes algorithm with 128 - bit keys. the aes core also supports ecb, cbc, cfb, ofb, ctr, and cbc - mac, as well as hardware support for ccm. the adc supports 7 to 12 bits of resolution with a corresponding range of bandwidths from 30 - khz to 4 - khz, respectively. dc and audio conversions with up to eight input channels (i /o controller pins) are possible. the inputs can be selected as single - ended or differential. the reference voltage can be internal, avdd, or a single - ended or differential external signal. the adc also has a temperature - sensor input channel. the adc can a utomate the process of periodic sampling or conversion over a sequence of channels. the operational amplifier is intended to provide front - end buffering and gain for the adc. both inputs as well as the output are available on pins, so the feedback network is fully customizable. a chopper - stabilized mode is available for applications that need good accuracy with high gain. the ultralow - power analog comparator enables applications to wake up from pm2 or pm3 based on an analog signal. both inputs are brought o ut to pins; the reference voltage must be provided externally. the comparator output is connected to the i/o controller interrupt detector and can be treated by the mcu as a regular i/o pin interrupt. rf front end rf front end includes combined matched bal un and low pass filter , and ceramic chip antenna with matching network . optimal matching combined with effective low pass filter provides extremely low in - band spurious emissions and harmonics. optionally as a module assembly variant rf can be traced ei the r to an embedded u.fl connector or to the rf pin of the module.
bluegiga technologies oy page 28 of 34 8 certifications BLE112 is compliant to the following specifications. 8.1 bluetooth BLE112 bluetooth low energ y module is bluetooth qualified a nd listed as a controller subsystem and it is bluetoo th compliant to the following pr ofiles of the core spec version v.4.0 : ? rf phy ? hci ? ll the maximum antenna gain specified for BLE112 is 2.3 dbi. bluetooth qualification is valid for any antenna with gain less than 2.3 dbi. 8.2 fcc and ic this device compli es with part 15 of the fcc rules. operation is subject to the following two co nditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operati on. fcc rf radiation exposure statement: this equipment complies with fcc radiation exposure limits set forth for an uncontrolled environment. end users must follow the specific operating instructions for satisfying rf exposure compliance. this transmitt er must not be co - located or operating in conjunction with any other antenna or transmitter. ic statements : this device complies with industry canada licence - exempt rss standard(s). operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. under industry canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain approved for the transmitter by industry canada. to reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication. if detachable antennas are used: this radio transmitter (identify the device by certification number, or model number ifcategory ii) has been approved by industry canada to operate with the antenna types liste d below with the maximum permissible
bluegiga technologies oy page 29 of 34 gain and required antenna impedance for each antenna type indicated. antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with thi s device. see table 8 for the approved antennas for BLE112. oem responsibilities to comply with fcc and industry canada regulations the BLE112 m odule has been certified for integration into products only by oem integrators under the followin g condition : ? the transmitter module must not be co - located or operating in conjunction with any other antenna or transmitter. as long as the condition above is met , further transmitter testing will not be required. however, the oem integrator is still responsible for testing their end - product for any additional compliance requirements required with this module installed (for example, digital device emissions, pc peripheral requirements, etc.). important note: in the event that these condition s can not be met (for certain configurations or co - location with another transmitter), then the fcc and industry canada authorizations are no longer considered valid and the fcc id and ic certification number can not be used on the final product. in these circumstances, the oem integrator will be responsible for re - evaluating the end product (including the transmitter) and obtaining a separate fcc and industry canada authorization. end product labeling the BLE112 m odule is labeled with its own fcc id and i c certification number. if the fcc id and ic certification number are not visible when the module is installed inside another device, then the outside of the device into which the module is installed must also display a label referring to the enclosed modu le. in that case, the final end product must be labeled in a visible area with the following: contains transmitter module fcc id: qoq BLE112 contains transmitter module ic: 5123a - bgt BLE112 or contains fcc id: qoq BLE112 contains ic: 5123a - bgt BLE112 the oem of the BLE112 module must only use the approved antenna(s) listed in table 8 , which have been certified with this module. the oem integrator has to be aware not to provide information to the end user regarding how to install or remove this rf module or change rf related parameters in the user manual of the end product. 8.2.1 fcc et ic dclaration dic : ce dispositif est conforme aux normes rss exemptes de licence dindustrie canada. son fonctionnement est assujetti aux de ux conditions suivantes : (1) ce dispositif ne doit pas provoquer de perturbation et (2) ce
bluegiga technologies oy page 30 of 34 dispositif doit accepter toute perturbation, y compris les perturbations qui peuvent entra?ner un fonctionnement non dsir du dispositif. selon les rglementations dindustrie canada, cet metteur radio ne doit fonctionner quavec une antenne dune typologie spcifique et dun gain maximum (ou infrieur) approuv pour lmetteur par industrie canada. pour rduire les ventuelles perturbations radiolectriques nuisib les dautres utilisateurs, le type dantenne et son gain doivent tre choisis de manire ce que la puissance isotrope rayonne quivalente (p.i.r.e.) nexcde pas les valeurs ncessaires pour obtenir une communication convenable. si des antennes amovi bles sont utilises : cet metteur radio (identifier le dispositif laide de son numro de certification ou de son numro de modle sil appartient la catgorie ii) a t approuv par industrie canada pour fonctionner avec les types dantenne numrs ci - dessous, avec le gain admissible maximum et limpdance dantenne requise pour chaque type dantenne indiqu. les types dantennes qui ne figurent pas dans cette liste ont un gain suprieur au gain maximum indiqu pour ce type ; il est donc strictement dfendu de les utiliser avec ce di spositif. consulter le tableau 8 pour dcouvrir les antennes approuves pour BLE112. responsabilits des oem quant la conformit avec les rglementations de fcc et dindustrie canada le module BLE112 a t certifi pour tre intgr des produits fabriqus uniquement par les intgrateurs oem dans les conditions suivantes : le module de lmetteur ne doit pas tre situ prs dune autre antenne ou dun autre metteur ni ou fonctionner conjointement avec ceux - ci. dans la mesure o cette condition est observe, il ne sera pas ncessaire de soumettre lmetteur des essais supplmentaires. cependant, lintgrateur oem est charg de tester son produit final pour sassurer quil respecte toutes les autres exigences de conform it requises avec ce module install (par exemple : missions du dispositif numrique, exigences priphriques de lordinateur, etc.). remarque importante : en cas dinobservance de ces conditions (en ce qui concerne certaines configurations ou lemplacem ent du dispositif proximit dun autre metteur), les autorisations de fcc et dindustrie canada ne seront plus considres valables et lidentification de fcc et le numro de certification dic ne pourront pas tre utiliss sur le produit final. dans ce s cas, lintgrateur oem sera charg dvaluer nouveau le produit final (y compris lmetteur) et dobtenir une autorisation indpendante de fcc et dindustrie canada. tiquetage du produit final le module BLE112 est tiquet avec sa propre identificati on fcc et son propre numro de certification ic. si lidentification fcc et le numro de certification ic ne sont pas visibles lorsque le module est install lintrieur dun autre dispositif, la partie externe du dispositif dans lequel le module est ins tall devra galement prsenter une tiquette faisant rfrence au module inclus. dans ce cas, le produit final devra tre tiquet sur une zone visible avec les informations suivantes : ? contient module metteur identification fcc : qoqBLE112 ? ? contie nt module metteur ic : 5123a - bgtBLE112 ? ou ? contient identification fcc : qoqBLE112 ? ? contient ic : 5123a - bgtBLE112 ?
bluegiga technologies oy page 31 of 34 loem du module BLE112 ne doit utiliser que la ou les antennes approuves numres dans le tableau 8 , qui ont t certifies avec ce module. dans le guide dutilisation du produit final, lintgrateur oem doit sabstenir de fournir des informations lutilisateur final portant sur les procdures suivre pour installer ou retirer ce module rf ou pour changer les paramtres rf. 8.3 ce BLE112 is in conformity with the essential requirements and other relevant requirements of the r&tte directive (1999/5/ec). the official doc is available at www.bluegiga.com 8.4 mic japan BLE112 has type approval with certification id r 209 - j00046 8.5 kcc (korea) BLE112 is kcc certified with following certification numbers BLE112 - a: kcc - crm - bgt - BLE112 - a BLE112 - e: kcc - crm - bgt - BLE112 - e BLE112 - n: kcc - crm - bgt - BLE112 - n 8.6 qualified antenna types for BLE112 - e and BLE112 - n this d evice has been designed to operate with a standard 2.14 db i dipole antenna . any antenna of the same type and the same or less gain can be used without additi onal application to fcc. table 8 lists approved antennas for BLE112. any approved antenna list ed in table 8 can be used directly with BLE112 without any additional approval . a ny antenna not listed in table 8 can be used with BLE112 as long as detailed information from that particular antenna is provided to bluegiga for approval . specification of each antenna used with BLE112 will be filed by bluegiga. please, contact support@bluegiga.com for more information. item manufacturer manufacturers part number measure d gain (dbi) spec ifie d gain (dbi) measure total efficiency (%) 1 pulse w1030 1 2 dbi 70 - 80 2 linx technologies inc ant - 2.4 - cw - ct - sma 1.3 2 dbi 77 3 ead ea - 79a 0.4 2 dbi 60 4 antenova b4844/b6090 1.4 2 dbi 76 - 82 5 litecon car - atr - 187 - 001 0.8 2 dbi 60 - 70 table 8 : approved antennas for BLE112 - e and BLE112 - n
bluegiga technologies oy page 32 of 34
bluegiga technologies oy page 33 of 34 9 contact information sales: sales@bluegiga.com technical support: support@bluegiga.com http://techforum.bluegiga.com orders : orders@bluegiga.com www: www.bluegiga.com www.blue giga.hk head office / finland: phone: +358 - 9 - 4355 060 fax: +358 - 9 - 4355 0660 sinikalliontie 5a 02630 espoo finland postal address / finland : p.o. box 120 02631 espoo finland sales office / usa: phone: +1 770 291 2181 fax: +1 770 291 2183 bluegiga technolo gies, inc. 3235 satellite boulevard, building 400, suite 300 duluth, ga, 30096, usa sales office / hong - kong: phone: +852 3972 2186 bluegiga technologies ltd. unit 10 - 18 32/f, tower 1, millennium city 1 388 kwun tong road kwun tong, kowloon hong kon g
bluegiga technologies oy page 34 of 34

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